Lithography is a key factor in the drive for higher levels of micro-circuit integration. Dynamic RAMs have quadrupled in the level of integration every three years as a result of the reduction in minimum geometries and increases in chip size. As minimum geometries approach 0.5 .mu.m and below, lithography alternatives include optics, electron beam direct write, X-ray and electron/ion beam proximity technologies. The latter three technologies are still in their infancy relative to optical lithography and still have obstacles to overcome, including decreased throughput, low source brightness and mask complexity, respectively.
While optical lithography continues to be the dominant technology because it is well established and is capable of implementing sub-micron resolution at least as low as 0.35 .mu.m, efforts into attaining smaller geometries are looking toward the newer technologies. In both optical lithography and its alternatives, progress into the realm of shorter wavelengths introduces increased sensitivities to minute surface imperfections including contaminants on optical surfaces, aberrations introduced by lenses and mirrors, photoresist thickness and surface variations and wafer flatness and planarity.
An area that significantly limits present lithographic technique as well as future technology is that of monitoring and control of exposure and alignment.
The most common practice is to coat an entire lot of wafer then expose one or two lead wafers at the last known good exposure time for that mask level on that particular stepper. After develop, the lead wafers are measured and inspected for pattern quality, critical dimensions (CDs) and alignment. If the lead wafers are within specification, the remainder of the lot is processed at the same exposure. If the lead wafers are out of specification, another lead wafer is run at a higher or lower exposure depending on whether the CDs on the first lead wafers were high or low, respectively. This trial-and-error process results in yield reduction because the first lead wafers may be out of specification. Further, if the lead wafer is not representative of the lot, for example, the film being patterned is of a different color due to different thickness, the entire lot may receive an incorrect exposure. The photoresist must then be stripped from the wafers and the processing at that mask level must be repeated. Reworks also often result in yield reduction.
Additional limitations in the area of lithography are experienced due to uniqueness of the optical train for each individual stepper. Although two or more steppers may theoretically be identical machines, optical corrections are tailored for each machine, or each machine may react differently to environmental conditions, causing each machine to have its own unique aberrations and distortions. For this reason, once a lot is started it often must be processed through the same stepper at every subsequent mask level, which can significantly diminish throughput.
In co-pending applications for "Adaptive Optic Wafer Stepper Illumination System" (Ser. No. 07/609,888, filed Nov. 5, 1990), "Deformable Wafer Chuck" (Ser. No. 07/609,816, filed Nov. 5, 1990), and "Illumination System with Aspherization and Aberration Correction by Phase Steps" (Ser. No. 07/609,830, filed Nov. 5, 1990) the inventors disclose the use of an interferometric system for realtime monitoring and control of aberrations, distortion and wafer flatness. It would be desirable to provide a process control system applicable to any type of stepper which permits in situ monitoring of the illumination pattern and the wafer, and provides corrections to ensure correct exposure. It is to such a system that the present invention is directed.